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MAX232E  
www.ti.com  
SLLS723B –APRIL 2006–REVISED NOVEMBER 2009  
DUAL RS-232 DRIVER/RECEIVER WITH IEC61000-4-2 PROTECTION  
Check for Samples: MAX232E  
1
FEATURES  
?
Meets or Exceeds TIA/RS-232-F and ITU  
Recommendation V.28  
D, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
?
Operates From a Single 5-V Power Supply  
VCC  
C1+  
VS+  
C1?  
With 1.0-μF Charge-Pump Capacitors  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
GND  
DOUT1  
RIN1  
?
?
?
?
?
Operates up to 250 kbit/s  
Two Drivers and Two Receivers  
±30-V Input Levels  
C2+  
C2?  
ROUT1  
Low Supply Current . . . 8 mA Typical  
ESD Protection for RS-232 Bus Pins  
11 DIN1  
VS?  
10  
9
DIN2  
ROUT2  
DOUT2  
RIN2  
–
–
–
±15-kV Human-Body Model (HBM)  
±8-kV IEC61000-4-2, Contact Discharge  
±15-kV IEC61000-4-2, Air-Gap Discharge  
APPLICATIONS  
?
?
?
?
?
TIA/RS-232-F  
Battery-Powered Systems  
Terminals  
Modems  
Computers  
DESCRIPTION/ORDERING INFORMATION  
The MAX232E is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/RS-232-F  
voltage levels from a single 5-V supply. Each receiver converts TIA/RS-232-F inputs to 5-V TTL/CMOS levels.  
This receiver has a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V inputs. Each  
driver converts TTL/CMOS input levels into TIA/RS-232-F levels. The driver, receiver, and voltage-generator  
functions are available as cells in the Texas Instruments LinASIC? library.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright ? 2006–2009, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
MAX232E  
SLLS723B –APRIL 2006–REVISED NOVEMBER 2009  
www.ti.com  
Table 1. ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
ORDERABLE PART NUMBER  
MAX232ECN  
TOP-SIDE MARKING  
PDIP – N  
SOIC – D  
Tube of 25  
MAX232ECN  
Tube of 40  
Reel of 2500  
Tube of 40  
Reel of 2000  
Tube of 25  
Reel of 2000  
Tube of 25  
Tube of 40  
Reel of 2500  
Tube of 40  
Reel of 2000  
Tube of 25  
Reel of 2000  
MAX232ECD  
MAX232EC  
MAX232ECDR  
MAX232ECDW  
MAX232ECDWR  
MAX232ECPW  
MAX232ECPWR  
MAX232EIN  
0°C to 70°C  
SOIC – DW  
MAX232EC  
TSSOP – PW  
PDIP – N  
MA232EC  
MAX232EIN  
MAX232EI  
MAX232EID  
SOIC – D  
MAX232EIDR  
–40°C to 85°C  
MAX232EIDW  
SOIC – DW  
MAX232EI  
MB232EI  
MAX232EIDWR  
MAX232EIPW  
TSSOP – PW  
MAX232EIPWR  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
Table 2. FUNCTION TABLES  
ABC  
Each Driver(1)  
INPUT  
DIN  
OUTPUT  
DOUT  
L
H
L
H
(1) H = high level, L = low level  
Table 3. Each Receiver(1)  
INPUT  
RIN  
OUTPUT  
ROUT  
L
H
L
H
(1) H = high level, L = low level  
LOGIC DIAGRAM (POSITIVE LOGIC)  
11  
10  
12  
9
14  
DIN1  
DIN2  
DOUT1  
DOUT2  
RIN1  
7
13  
8
ROUT1  
ROUT2  
RIN2  
2
Submit Documentation Feedback  
Copyright ? 2006–2009, Texas Instruments Incorporated  
Product Folder Link(s): MAX232E  
MAX232E  
www.ti.com  
SLLS723B –APRIL 2006–REVISED NOVEMBER 2009  
Absolute Maximum Ratings(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–0.3  
MAX UNIT  
VCC  
VS+  
VS–  
Input supply voltage range(2)  
6
15  
V
V
V
Positive output supply voltage range  
Negative output supply voltage range  
VCC – 0.3  
–0.3  
–15  
Driver  
–0.3  
VCC + 0.3  
±30  
VI  
Input voltage range  
V
V
Receiver  
DOUT  
VS– – 0.3  
–0.3  
VS+ + 0.3  
VCC + 0.3  
Unlimited  
73  
VO  
Output voltage range  
Short-circuit duration  
ROUT  
DOUT  
D package  
DW package  
N package  
PW package  
57  
θJA  
Package thermal impedance(3) (4)  
°C/W  
67  
108  
TJ  
Operating virtual junction temperature  
Storage temperature range  
150  
°C  
°C  
Tstg  
–65  
150  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltages are with respect to network GND.  
(3) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient  
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
Recommended Operating Conditions  
MIN  
4.5  
2
NOM  
MAX UNIT  
VCC  
VIH  
VIL  
Supply voltage  
5
5.5  
V
V
V
V
High-level input voltage (DIN1, DIN2)  
Low-level input voltage (DIN1, DIN2)  
Receiver input voltage (RIN1, RIN2)  
0.8  
±30  
70  
MAX232EC  
MAX232EI  
0
TA  
Operating free-air temperature  
°C  
–40  
85  
Electrical Characteristics(1)  
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP(2) MAX UNIT  
ICC  
Supply current  
VCC = 5.5 V,  
All outputs open, TA = 25°C  
8
10 mA  
(1) Test conditions are C1–C4 = 1 μF at VCC = 5 V ± 0.5 V.  
(2) All typical values are at VCC = 5 V and TA = 25°C.  
Copyright ? 2006–2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Link(s): MAX232E  
MAX232E  
SLLS723B –APRIL 2006–REVISED NOVEMBER 2009  
www.ti.com  
DRIVER SECTION  
abc  
Electrical Characteristics(1)  
over recommended ranges of supply voltage and operating free-air temperature range  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP(2)  
MAX UNIT  
VOH High-level output voltage  
DOUT  
DOUT  
DOUT  
RL = 3 k? to GND  
5
7
V
VOL  
ro  
Low-level output voltage(3)  
Output resistance  
RL = 3 k? to GND  
–7  
–5  
V
VS+ = VS– = 0,  
VO = ±2 V  
VO = 0  
300  
?
IOS  
Short-circuit output current  
Short-circuit input current  
DOUT  
DIN  
VCC = 5.5 V,  
VI = 0  
±10  
mA  
(4)  
IIS  
200  
μA  
(1) Test conditions are C1–C4 = 1 μF at VCC = 5 V ± 0.5 V.  
(2) All typical values are at VCC = 5 V and TA = 25°C.  
(3) The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic  
voltage levels only.  
(4) Not more than one output should be shorted at a time.  
Switching Characteristics(1)  
VCC = 5 V, TA = 25°C (see Note 4)  
PARAMETER  
TEST CONDITIONS  
RL = 3 k? to 7 k?, See Figure 2  
See Figure 3  
MIN  
TYP  
MAX  
UNIT  
V/μs  
V/μs  
kbit/s  
SR  
Driver slew rate  
30  
SR(t)  
Driver transition region slew rate  
Data rate  
3
One DOUT switching  
250  
(1) Test conditions are C1–C4 = 1 μF at VCC = 5 V ± 0.5 V.  
ESD protection  
PARAMETER  
HBM  
TEST CONDITIONS  
TYP  
±15  
±15  
±8  
UNIT  
kV  
DOUT, RIN  
IEC61000-4-2, Air-Gap Discharge  
IEC61000-4-2, Contact Discharge  
kV  
kV  
4
Submit Documentation Feedback  
Copyright ? 2006–2009, Texas Instruments Incorporated  
Product Folder Link(s): MAX232E  
MAX232E  
www.ti.com  
SLLS723B –APRIL 2006–REVISED NOVEMBER 2009  
RECEIVER SECTION  
abc  
Electrical Characteristics(1)  
over recommended ranges of supply voltage and operating free-air temperature range  
PARAMETER  
VOH High-level output voltage  
VOL  
Low-level output voltage(3)  
TEST CONDITIONS  
MIN TYP(2)  
MAX  
UNIT  
V
ROUT  
ROUT  
RIN  
IOH = –1 mA  
3.5  
IOL = 3.2 mA  
VCC = 5 V,  
VCC = 5 V,  
VCC = 5 V  
VCC = 5 V,  
0.4  
2.4  
V
VIT+ Receiver positive-going input threshold voltage  
VIT– Receiver negative-going input threshold voltage  
Vhys Input hysteresis voltage  
TA = 25°C  
TA = 25°C  
1.7  
V
RIN  
0.8  
0.2  
3
1.2  
0.5  
5
V
RIN  
1
7
V
ri  
Receiver input resistance  
RIN  
TA = 25°C  
k?  
(1) Test conditions are C1–C4 = 1 μF at VCC = 5 V ± 0.5 V.  
(2) All typical values are at VCC = 5 V and TA = 25°C.  
(3) The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic  
voltage levels only.  
Switching Characteristics(1)  
VCC = 5 V, TA = 25°C (see Figure 1)  
PARAMETER  
Receiver propagation delay time, low- to high-level output  
Receiver propagation delay time, high- to low-level output  
TYP UNIT  
tPLH(R)  
tPHL(R)  
500  
500  
ns  
ns  
(1) Test conditions are C1–C4 = 1 μF at VCC = 5 V ± 0.5 V.  
Copyright ? 2006–2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Link(s): MAX232E  
MAX232E  
SLLS723B –APRIL 2006–REVISED NOVEMBER 2009  
www.ti.com  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
R
L
= 1.3 k?  
See Note C  
Pulse  
Generator  
(see Note A)  
ROUT  
RIN  
C
L
= 50 pF  
(see Note B)  
TEST CIRCUIT  
≤10 ns  
≤10 ns  
3 V  
0 V  
90%  
50%  
90%  
50%  
Input  
10%  
10%  
500 ns  
t
PLH  
t
PHL  
V
V
OH  
Output  
1.5 V  
1.5 V  
WAVEFORMS  
OL  
A. The pulse generator has the following characteristics: ZO = 50 ?, duty cycle ≤ 50%.  
B. CL includes probe and jig capacitance.  
C. All diodes are 1N3064 or equivalent.  
Figure 1. Receiver Test Circuit and Waveforms for tPHL and tPLH Measurements  
6
Submit Documentation Feedback  
Copyright ? 2006–2009, Texas Instruments Incorporated  
Product Folder Link(s): MAX232E  
MAX232E  
www.ti.com  
SLLS723B –APRIL 2006–REVISED NOVEMBER 2009  
PARAMETER MEASUREMENT INFORMATION (continued)  
Pulse  
Generator  
(see Note A)  
DIN  
DOUT  
RS-232 Output  
C = 10 pF  
(see Note B)  
L
R
L
TEST CIRCUIT  
≤10 ns  
≤10 ns  
3 V  
0 V  
90%  
50%  
90%  
50%  
Input  
10%  
10%  
5 μs  
t
PLH  
t
PHL  
V
V
90%  
OH  
90%  
Output  
10%  
10%  
OL  
t
TLH  
t
THL  
0.8 (V  
– V  
)
0.8 (V  
– V  
)
OH  
t
OL  
OL  
t
OH  
SR +  
or  
TLH  
WAVEFORMS  
THL  
A. The pulse generator has the following characteristics: ZO = 50 ?, duty cycle ≤ 50%.  
B. CL includes probe and jig capacitance.  
Figure 2. Driver Test Circuit and Waveforms for tPHL and tPLH Measurements (5-μs Input)  
Pulse  
DIN  
DOUT  
Generator  
RS-232 Output  
(see Note A)  
3 k?  
C
L
= 2.5 nF  
TEST CIRCUIT  
≤10 ns  
≤10 ns  
Input  
90%  
1.5 V  
90%  
1.5 V  
10%  
10%  
20 μs  
t
TLH  
t
THL  
V
V
OH  
3 V  
?3 V  
3 V  
Output  
?3 V  
6 V  
OL  
SR +  
t
or t  
THL  
TLH  
WAVEFORMS  
A. The pulse generator has the following characteristics: ZO = 50 ?, duty cycle ≤ 50%.  
Figure 3. Test Circuit and Waveforms for tTHL and tTLH Measurements (20-μs Input)  
Copyright ? 2006–2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
7
Product Folder Link(s): MAX232E  
MAX232E  
SLLS723B –APRIL 2006–REVISED NOVEMBER 2009  
www.ti.com  
APPLICATION INFORMATION  
5 V  
+
?
C
= 1 μF  
BYPASS  
16  
?
1 μF  
C3  
V
CC  
1
3
4
5
2
C1+  
C1?  
C2+  
C2?  
8.5 V  
?8.5 V  
V
C1  
C2  
1 μF  
S+  
6
V
S?  
1 μF  
C4  
1 μF  
+
14  
11  
RS-232 Output  
RS-232 Output  
RS-232 Input  
RS-232 Input  
From CMOS or TTL  
To CMOS or TTL  
10  
12  
7
13  
8
9
0 V  
15  
GND  
?
C3 can be connected to V or GND.  
CC  
A. Resistor values shown are nominal.  
B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should  
be connected as shown. In addition to the 1-μF capacitors shown, the MAX202E can operate with 0.1-μF capacitors.  
Figure 4. Typical Operating Circuit  
8
Submit Documentation Feedback  
Copyright ? 2006–2009, Texas Instruments Incorporated  
Product Folder Link(s): MAX232E  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Nov-2009  
PACKAGING INFORMATION  
Orderable Device  
MAX232ECD  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOIC  
D
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
16  
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX232ECDG4  
MAX232ECDR  
MAX232ECDRG4  
MAX232ECDW  
MAX232ECDWG4  
MAX232ECDWR  
MAX232ECDWRG4  
MAX232ECN  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
D
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DW  
DW  
DW  
DW  
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
MAX232ECNE4  
MAX232ECPW  
MAX232ECPWG4  
MAX232ECPWR  
MAX232ECPWRG4  
MAX232EID  
PDIP  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PW  
PW  
PW  
PW  
D
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX232EIDG4  
MAX232EIDR  
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX232EIDRG4  
MAX232EIDW  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
DW  
DW  
DW  
DW  
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX232EIDWG4  
MAX232EIDWR  
MAX232EIDWRG4  
MAX232EIN  
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
MAX232EINE4  
MAX232EIPW  
PDIP  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
TSSOP  
PW  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Nov-2009  
Orderable Device  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
MAX232EIPWG4  
MAX232EIPWR  
TSSOP  
PW  
16  
16  
16  
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
PW  
PW  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
MAX232EIPWRG4  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
30-Jul-2010  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
MAX232ECDR  
MAX232ECDWR  
MAX232ECPWR  
MAX232EIDR  
SOIC  
SOIC  
D
16  
16  
16  
16  
16  
16  
2500  
2000  
2000  
2500  
2000  
2000  
330.0  
330.0  
330.0  
330.0  
330.0  
330.0  
16.4  
16.4  
12.4  
16.4  
16.4  
12.4  
6.5  
10.3  
2.1  
2.7  
1.6  
2.1  
2.7  
1.6  
8.0  
12.0  
8.0  
16.0  
16.0  
12.0  
16.0  
16.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
DW  
PW  
D
10.75 10.7  
TSSOP  
SOIC  
6.9  
6.5  
5.6  
10.3  
8.0  
MAX232EIDWR  
MAX232EIPWR  
SOIC  
DW  
PW  
10.75 10.7  
6.9 5.6  
12.0  
8.0  
TSSOP  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
30-Jul-2010  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
MAX232ECDR  
MAX232ECDWR  
MAX232ECPWR  
MAX232EIDR  
SOIC  
SOIC  
D
16  
16  
16  
16  
16  
16  
2500  
2000  
2000  
2500  
2000  
2000  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
33.0  
33.0  
29.0  
33.0  
33.0  
29.0  
DW  
PW  
D
TSSOP  
SOIC  
MAX232EIDWR  
MAX232EIPWR  
SOIC  
DW  
PW  
TSSOP  
Pack Materials-Page 2  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°–8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
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